| 1 | | Using sequents for description of concurrent digital systems behavior by Arkadij Zakrevskij | | 3 |
| 2 | | Formal logic design of reprogrammable controllers by Marian Adamski | | 15 |
| 3 | | Hierarchical Petri nets for digital controller design by Grzegorz Andrzejewski | | 27 |
| 4 | | WCET prediction for embedded processors using an ADL by Adriano Tavarev and Carlos Silva and Carlos Lima and Jose Metrolho and Carlos Couto | | 39 |
| 5 | | Verification of control paths using Petri nets by Torsten Schober and Andreas Reinsch and Werner Erhard | | 51 |
| 6 | | Memory-saving analysis of Petri nets by Andrei Karatkevich | | 63 |
| 7 | | Symbolic state exploration of UML statecharts for hardware description by Grzegorz Labiak | | 73 |
| 8 | | Calculating state spaces of hierarchical Petri nets using BDD by Piotr Miczulski | | 85 |
| 9 | | A new approach to simulation of concurrent controllers by Agnieszka Wegrzyn and Marek Wegrzyn | | 95 |
| 10 | | Optimal state assignment of synchronous parallel automata by Yury Pottosin | | 111 |
| 11 | | Optimal state assignment of asynchronous parallel automata by Ljudmila Cheremisinova | | 125 |
| 12 | | Design of embedded control systems using hybrid Petri nets by Thorsten Hummel and Wolfgang Fengler | | 139 |
| 13 | | Structuring mechanisms in Petri net models by Luis Gomes and Joao Paulo Barros and Aniko Costa | | 153 |
| 14 | | Implementing a Petri net specification in a FPGA using VHDL by Enrique Soto and Miguel Pereira | | 167 |
| 15 | | Finite state machine implementation in FPGAs by Hana Kubatova | | 175 |
| 16 | | Block synthesis of combinational circuits by Pyotr Bibilo and Natalia Kirienko | | 185 |
| 17 | | The influence of functional decomposition on modern digital design process by Mariusz Rawski and Tadeusz Luba and Zbigniew Jachna and Pawel Tomaszewicz | | 193 |
| 18 | | Development of embedded systems using OORT by Sergio Lopes and Carlos Silva and Adriano Tavares and Joao Monteiro | | 207 |
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